Master Thesis: Accelerating Automotive Workloads through RISC-V Extensions and Hardware Accelerators
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chair:
CDNC
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Description:
Road vehicles have long emerged into highly complex computers, with autonomous driving and driver assistance requiring fast and reliable processing of sensor data to enable safe and secure agents in the complex environment of traffic [1]. To achieve the required data throughput, dedicated hardware accelerators, for instance, for matrix vector multiplications as required in computer vision algorithms, are essential. An open Instruction Set Architecture (ISA), such as RISC-V, allows to investigate the performance improvements that can be achieved through additional instructions for operations, that are typical in automotive workloads.
In this master thesis, which is supervised jointly by the Chair of Dependable Nano-Computing (Prof. Tahoori) and Intel Labs, you will analyze workloads that represent state-of-the-art perception and behavior planning tasks. The experimental platform will be based around the LiteX framework (https://github.com/enjoy-digital/litex), which you will use to implement a RISC-V SoC in hardware on a Field Programmable Gate Array (FPGA). You will get hands on experience with RISC-V and FPGAs, deep-dive into the existing RISC-V ISA, understand limitations, and propose improvements (e.g. via custom instructions). Afterwards, you will adapt compilers and finally demonstrate performance benefits over an initial baseline.
Requirements:
• Basic knowledge of algorithms and data structures
• Knowledge of C/C++ programming and Linux
• Basic knowledge of digital circuits
• Ideally: FPGA experience, compiler construction, computer vision
Keywords:
FPGAs, RISC-V, Linux, Automotive, Hardware, Accelerator
Contact:
Jonas Krautter, jonas.krautter@kit.edu, 0721/608-47684
Fabian Oboril, fabian.oboril@intel.com
[1] Bernd Gassmann, Fabian Oboril, Cornelius Buerkle, Shuang Liu, Shoumeng Yan, Maria Soledad Elli, Ignacio Alvarez, Naveen Aerrabotu, Suhel Jaber, Peter van Beek, Darshan Iyer, and Jack Weast. "Towards standardization of AV safety: C++ library for responsibility sensitive safety". In 2019 IEEE Intelligent Vehicles Symposium (IV), 2019.