Short Bio

Jonas Krautter received his PhD with distinction from Karlsruhe Institute of Technology in 2022 for his thesis "Analysis and Mitigation of Remote Side-Channel and Fault Attacks on the Electrical Level". He is a postdoctoral researcher at the CDNC group of Prof. Mehdi B. Tahoori at Karlsruhe Institute of Technology, working on hardware security. His focus is on fault and side-channel attacks, especially in FPGA-based systems.

Publications

Journals
S. Meschkov, D. R. E. Gnad, J. Krautter and M. B. Tahoori New Approaches of Side-Channel Attacks Based on Chip Testing Methods in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (Volume 42, Issue 5), DOI, PDF, 2023.
J. Krautter, D. R. E. Gnad, M. B. Tahoori Remote Fault Attacks in Multi-Tenant Cloud FPGAs in IEEE Design & Test, 2022. (Revised Publication for Top Picks in Hardware Security 2020)
D. R. E. Gnad, F. Schellenberg, J. Krautter, A. Moradi and M. B. Tahoori Remote Electrical-level Security Threats to Multi-Tenant FPGAs, in IEEE Design & Test, 2020.
J. Krautter, D. Gnad, M. Tahoori CPAmap: On the Complexity of Secure FPGA Virtualization, Multi-Tenancy, and Physical Design in IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES), 2020.
J. Krautter, D. R. E. Gnad, M. B. Tahoori FPGAhammer: Remote Voltage Fault Attacks on Shared FPGAs, suitable for DFA on AES IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES), 2018. CSAW'18 Finalist
J. Krautter, D. R. E. Gnad, M. B. Tahoori Mitigating Electrical-Level Attacks towards Secure Multi-Tenant FPGAs in the Cloud in ACM Transactions on Reconfigurable Technology and Systems (TRETS), 2019.
D. R. E. Gnad, J. Krautter, M. B. Tahoori Leaky Noise: New Side-Channel Attack Vectors in Mixed-Signal IoT Devices in IACR Transactions on Cryptographic Hardware and Embedded Systems (TCHES), 2019.

Conferences
M. Sadeghipourrudsari, J. Krautter, M. Tahoori OTFGEncoder-HDC: Hardware-efficient Encoding Techniques for HyperdimensionalComputing in Proceedings of Design, Automation & Test in Europe (DATE), Spain, Mar 2024.
J. Krautter, P. Genssler, G. Sepanta, H. Amrouch, M. Tahoori Stress-resiliency of AI implementations on FPGAs in 33rd International Conference on Field-Programmable Logic and Applications (FPL), 2023.
M. Gross, J. Krautter, D. Gnad, M. Gruber, G. Sigl, M. Tahoori FPGANeedle: Precise Remote Fault Attacks from FPGA to CPU in 28th Asia and South Pacific Design Automation Conference (ASP-DAC), 2023.
J. Krautter, M. Mayahinia, D. R. E. Gnad, M. B. Tahoori Data Leakage through Self-Terminated Write Schemes in Memristive Caches in 27th Asia and South Pacific Design Automation Conference (ASP-DAC), 2022.
J. Krautter, D. R. E. Gnad, M. B. Tahoori Remote and Stealthy Fault Attacks on Virtualized FPGAs in Proceedings of Design, Automation & Test in Europe (DATE), 2021.
S. Meschkov, D. R. E. Gnad, J. Krautter, M. B. Tahoori Is your secure test infrastructure secure enough? in IEEE International Test Conference (ITC), 2021.
J. Krautter, D. R. E. Gnad, F. Schellenberg, A. Moradi, and M. B. Tahoori Active Fences against Voltage-based Side Channels in Multi-Tenant FPGAs in Proceedings of the International Conference on Computer-Aided Design (ICCAD), USA, 2019.
S. M. Ghasemi, S. Meschkov, J. Krautter, D. R. E. Gnad and M. Tahoori Enabling In-field Parametric Testing for RISC-V Cores in International Test Conference (ITC), Anaheim, USA, 2023.
S. M. Ghasemi, S. Meschkov, J. Krautter, D. R. E. Gnad and M. Tahoori SLM ISA and Hardware Extensions for RISC-V Processors in IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS), Crete, Greece, 2023.
S. M. Ghasemi, S. Meschkov, J. Krautter, D. R. E. Gnad and M. Tahoori In-field Detection of Small Delay Defects and Runtime Degradation using On-Chip Sensors in Design, Automation and Test in Europe Conference (DATE'24), Valencia, Spain, 2024.
S. M. Ghasemi, J. Krautter, T. Gheshlaghi, S. Meschkov, D. R. E. Gnad and M. Tahoori Degradation Monitoring Through Software-controlled On-chip Sensors for RISC-V in IEEE European Test Symposium (ETS), Hague, Netherlands, 2024.
Sapui, B., Krautter, J., Mayahinia, M., Jafari, A., Gnad D., Meschkov, S., Tahoori, M. B. Power Side-Channel Attacks and Countermeasures on Computation-in-Memory Architectures and Technologies in /2023 IEEE European Test Symposium (ETS)/, 2023. (Best paper nomination)
J. Krautter, M. B. Tahoori Neural Networks as a Side-Channel Countermeasure: Challenges and Opportunities IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2021. (Invited Paper)
D. R. E. Gnad, S. Rapp, J. Krautter, and M. B. Tahoori Checking for Electrical Level Security Threats in Bitstreams for Multi-Tenant FPGAs International Conference on Field-Programmable Technology (FPT), Japan, 2018.

Other
J. Krautter, D. R. E. Gnad, F. Schellenberg, A. Moradi, M. B. Tahoori Software-based Fault and Power Side-Channel Attacks inside Multi-Tenant FPGAs IEEE International Symposium on Hardware Oriented Security and Trust (HOST), USA, 2019. Demo Session, (BEST Hardware Demo Award, Third Place)