Priyanjana Pal  received her B.Tech. (Bachelor of Technology) in Electronics and Communication Engineering from the National Institute of Technology, Agartala, in 2018.  She completed her M.Tech. (Master of Technology) in Electrical Engineering (Microelectronics and VLSI Design) from the Indian Institute of Technology, Gandhinagar, Gujarat, India, in 2020. In her Master's thesis, she worked on the 3D-TCAD-based design and optimization of high voltage (HV) drain-extended FinFET transistors for analog SoC applications with  Professor Nihar R. Mohapatra. Before joining as a Ph.D. researcher at KIT, She worked for almost three years in the Device Enablement team in Global Foundries, Bangalore as a Senior ESD device, circuit design,  and compact modeling engineer. In 2022, she joined the CDNC group of Prof. Mehdi Tahoori at KIT University, Karlsruhe, Germany. Her current research interests are in analog circuit design with CAD tools, testing the reliability of printed circuits, and design of ML-trained printed and flexible neuromorphic circuits.