Description

While technology scaling continues to provide more transistors and devices on the chip, energy has become a very important design constraint in nano-meter technologies. Near-threshold computing (NTC) is a promising approach to reduce the power/energy consumption. The key feature of NTC is to reduce the supply voltage of the entire or part of the chip to a value very close to threshold voltage in order to lower the power and energy consumption. Although this technique can achieve orders of magnitudes reduction in power and energy consumption, it comes at the costs of important challenges such as lower operating frequencies, reduced performance, lower reliability and much higher sensitivity to process and runtime variations.

The objective of this seminar is to become familiar with general and state of the art techniques used in NTC and provides a base for research in this area. The prospective students can choose a specific topic from a wide range of areas at different abstraction levels (from device-level to system-level) based on their interests and background. The topics include but not limited to:
- Performance and energy tradeoff analysis
- Reliability and variability analysis and solutions for addressing these challenges
- Approximate computing techniques