M.Sc. Mahta Mayahinia
- PhD Student
- room: B2-309.1
- phone: +49 721 608 47658
- fax: +49 721 608 43962
- mahta mayahinia ∂ kit edu
Short Bio
Mahta Mayahinia received her B.s in Electrical and Electronic Engineering from Shahid Beheshti University, Tehran, Iran, and her M.s in Computer System Architecture from Sharif University of Technology, Tehran, Iran in 2015 and 2018 respectively. In her master thesis, she worked on accelerating data-intensive applications with the help of near/in-memory processing. She also worked as a researcher at TU Delft University, Delft, the Netherlands for 11 months with the main focus on circuit design for the computation in resistive memories. In 2020 she joined the CDNC group of Professor Tahoori at KIT University, Karlsruhe, Germany. Her current research interest is VLSI design, Computer Architecture, Computation in memory, and non-volatile memories.
Publications
Journals | |
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M. Mayahinia, M. Tahoori, M.P. Komalan, H. Zahedmanesh, K. Croes, T. Marinelli, J.I. Gómez Pérez, T. Evenblij, G. Sankar Kar, F. Catthoor Time-dependent electromigration modeling for workload-aware design space exploration in STT-MRAM in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2022. | |
M. Mayahinia, A. Singh, C. Bengel, S. Wiefels, M.A. Lebdeh, S. Menzel, D.k.J. Wouters, A. Gebregiorgis, R. Bishnoi, R. Joshi, S. Hamdioui A Voltage-Controlled Oscillation-Based ADC Design for Computation-in-Memory Architectures Using Emerging ReRAMs in ACM Journal on Emerging Technologies in Computing Systems (JETC), 2022. | |
S. Nair, M. Mayahinia, M. B Tahoori, M. Perumkunnil, H. Zahedmanesh, K. Croes, K. Garello, T. Marinelli, T. Evenblij, G. Sankar Kar, F. Catthoor Workload-aware Electromigration Analysis in Emerging Spintronic Memory Arrays IEEE Transactions on Device and Materials Reliability (TDMR), 2021. | |
Soyed Tuhin Ahmed, M Mayahinia, M Hefenbrock, C Münch, MB Tahoori Design-Time Reference Current Generation for Robust Spintronic-Based Neuromorphic Architecture in ACM Journal on Emerging Technologies in Computing Systems 20 (JETC), 2024. |
Conferences | |
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M. Mayahinia, M. Tahoori, G. Tshagharyan, G. Harutyunyan, Y. Zorian On-chip Electromigration Sensor for Silicon Lifecycle Management of Nanoscale VLS in Design, Automation and Test in Europe (DATE), Belgium, 2023. | |
M. Mayahinia, H. Liu, S. Mishra, Z. Tokei, F. Catthoor, M. Tahoori Electromigration-aware design technology co-optimization for SRAM in advanced technology nodes in Design, Automation and Test in Europe (DATE), Belgium, 2023. | |
M. Mayahinia, M. Tahoori, G. Harutyunyan, G. Tshagharyan, K. Amirkhanyan Analyzing the Electromigration Challenges of Computation in Resistive Memories in International Test Conference (ITC), 2022. | |
M. Mayahinia, M. Tahoori, M. Perumkunnil, K. Croes, F. Catthoor Analyzing the Electromigration Challenges of Computation in Resistive Memories in International Test Conference (ITC), 2022. | |
J. Krautter, M. Mayahinia, D. R. E. Gnad, M. B. Tahoori Data Leakage through Self-Terminated Write Schemes in Memristive Caches in 27th Asia and South Pacific Design Automation Conference (ASP-DAC), 2022. | |
M. Mayahinia, A. Jafari, M. Tahoori Voltage Tuning for Reliable computation in Emerging Resistive Memories in 40th VLSI Test Symposium (VTS), 2022. | |
M.Mayahinia, C. Münch, and Mehdi B. Tahoori Analyzing and Mitigating Sensing Failures in Spintronic-based Computing in Memory in IEEE International Test Conference (ITC), 2021. | |
Sapui, B., Krautter, J., Mayahinia, M., Jafari, A., Gnad D., Meschkov, S., Tahoori, M. B. Power Side-Channel Attacks and Countermeasures on Computation-in-Memory Architectures and Technologies in /2023 IEEE European Test Symposium (ETS)/, 2023. (Best paper nomination) | |
Soyed Tuhin Ahmed, Mahta Mayahinia, Michael Hefenbrock, Christopher Münch, and Mehdi B. Tahoori Process and Runtime Variation Robustness for Spintronic-Based Neuromorphic Fabric IEEE European Test Symposium (ETS), 2022. |