Sergej DG

M.Sc. Sergej Meschkov

Short Bio

Sergej Meschkov received his B.Sc. and M.Sc. degrees in Computer Science from Karlsruhe Institute of Technology in 2016 and 2020 respectively. In his Master Thesis he worked with the ITEC/CDNC group of Prof. Mehdi Tahoori and is now a PhD student there, working on hardware security.

Publications

Journals
S. Meschkov, D. R. E. Gnad, J. Krautter and M. B. Tahoori
New Approaches of Side-Channel Attacks Based on Chip Testing Methods
in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (Volume 42, Issue 5), DOI, PDF, 2023.
Schoos, K., Meschkov, S., Tahoori, M. B., & Gnad, D. R. E.
JitSCA: Jitter-based Side-Channel Analysis in Picoscale Resolution
in IACR Transactions on Cryptographic Hardware and Embedded Systems (Volume 2023, Issue 3), DOI, PDF, 2023.
Conferences
B. Sapui, S. Meschkov and M. B. Tahoori
Side-Channel Attack with Fault Analysis on Memristor-based Computation-in-Memory
in IEEE 30th International Symposium on On-Line Testing and Robust System Design (IOLTS), Rennes, France, DOI, PDF, 03 - 05 July 2024.
N. Muller, S. Meschkov, D. R. E. Gnad, M. B. Tahoori and A. Moradi
Automated Masking of FPGA-Mapped Designs
in 33rd International Conference on Field-Programmable Logic and Applications (FPL), Gothenburg, Sweden, DOI, PDF, 04 - 08 Sept 2023.
S. Meschkov, D. R. E. Gnad, J. Krautter, M. B. Tahoori
Is your secure test infrastructure secure enough?
in IEEE International Test Conference (ITC), 2021.
S. M. Ghasemi, S. Meschkov, J. Krautter, D. R. E. Gnad and M. Tahoori
Enabling In-field Parametric Testing for RISC-V Cores
in International Test Conference (ITC), Anaheim, USA, 2023.
S. M. Ghasemi, S. Meschkov, J. Krautter, D. R. E. Gnad and M. Tahoori
SLM ISA and Hardware Extensions for RISC-V Processors
in IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS), Crete, Greece, 2023.
S. M. Ghasemi, S. Meschkov, J. Krautter, D. R. E. Gnad and M. Tahoori
In-field Detection of Small Delay Defects and Runtime Degradation using On-Chip Sensors
in Design, Automation and Test in Europe Conference (DATE'24), Valencia, Spain, 2024.
S. M. Ghasemi, J. Krautter, T. Gheshlaghi, S. Meschkov, D. R. E. Gnad and M. Tahoori
Degradation Monitoring Through Software-controlled On-chip Sensors for RISC-V
in IEEE European Test Symposium (ETS), Hague, Netherlands, 2024.
Sapui, B., Krautter, J., Mayahinia, M., Jafari, A., Gnad D., Meschkov, S., Tahoori, M. B.
Power Side-Channel Attacks and Countermeasures on Computation-in-Memory Architectures and Technologies
in /2023 IEEE European Test Symposium (ETS)/, 2023.
(Best paper nomination)