M.Tech. Brojogopal Sapui
- PhD Student
- room: B2-307.2
- phone: +49 721 608 47586
- fax: +49 721 608 43962
- brojogopal sapui ∂does-not-exist.kit edu
Short Bio
Brojogopal Sapui received his B.Tech. (Bachelor of Technology) in Electronics and Communication Engineering from West Bengal University of Technology, India in 2012. He worked in IBM India as an Associate system Engineer for one year. He completed his M.Tech. (Master of Technology) in VLSI Design from National Institute of Technology, Meghalaya, India. In his Master thesis, he worked in designing model of Memristive devices and synthesizing Boolean functions within these. Then he worked several years as a researcher in Indian Institute of Technology (IIT) Kharagpur, Indian statistical Institute (ISI) Kolkata, Wipro Technologies (R&D) respectively with the focus on different aspects of hardware security, statistical applications in device security and automotive network security. In 2022, he joined the CDNC group of Prof. Mehdi Tahoori at KIT University, Karlsruhe, Germany. His current research interests are in VLSI design with CAD tools, computation in memory, emerging Non-Volatile Memories (NVMs) and hardware security.
Publications
| Conferences | |
|---|---|
| B. Sapui, S. Meschkov and M. B. Tahoori Side-Channel Attack with Fault Analysis on Memristor-based Computation-in-Memory in IEEE 30th International Symposium on On-Line Testing and Robust System Design (IOLTS), Rennes, France, DOI, PDF, 03 - 05 July 2024. | |
| Sapui, B., Krautter, J., Mayahinia, M., Jafari, A., Gnad D., Meschkov, S., Tahoori, M. B. Power Side-Channel Attacks and Countermeasures on Computation-in-Memory Architectures and Technologies in /2023 IEEE European Test Symposium (ETS)/, 2023. (Best paper nomination) | |
| Zhao, H., Sapui, B., Hefenbrock, M., Yang, Z., Beigl, M., & Tahoori, M. B. Highly-Bespoke Robust Printed Neuromorphic Circuits in /2023 Design, Automation and Test in Europe Conference & Exhibition (DATE)/, 2023. |
| Former Publications |
|---|
| N. Shah, D. Chatterjee, B.G. Sapui, D. Mukhopadhyay, A. Basu Introducing Recurrence in Strong PUFs for Enhanced Machine Learning Attack Resistance IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 2021 |
| F. Lalchhandama, B.G. Sapui, K. Datta An Improved Approach for the Synthesis of Boolean Functions Using Memristor Based IMPLY and INVERSE-IMPLY Gates IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2016 |