This lecture will be offered online (live interactive stream) at the planned lecture time using the Zoom platform. All the information including Zoom link and course materials will be available on ILIAS.

Notes

4 SWS / 6 ECTS = 180h

Prerequisites

Requirement: Digital Logic Design (Lecture Technische Informatik)

Description

Security is a major concern for a variety of domains like embedded and cyber-physical systems in which threats in hardware and software components may pose catastrophic consequences. Software security has been studied extensively, since the majority of security attacks were typically at the software level. However, currently hardware becomes the Achilles heel for on-chip system security as recent events show. There is evidence of hardware security breaches and hence, there is a growing emphasize in hardware security from academic, industry, and government sectors. In this regard, physical attacks, side-channel analysis and fault-injection attacks for security-enabled application domains is becoming a real-world challenge.

Content of teaching

1. Hardware security primitives (PUF, TRNG)

2. Hardware Implementation of encryption modules (AES)

3. Passive Attack with side channel (on AES)

4. Active fault attack (on simple circuits, if feasible also on AES)

Entry Requirements

Lab "FPGA Programming" is helpful

Workload

Each slot will be 1.5h + 1.5h, and will be done at CDNC lab once per week. In the first 1.5h either the lecture is presented, the lab assignment is explained or the students present assignment results, depending the schedule of that week. The second 1.5h will be used by the students to continue on implementing the assignment.

Target audience

Master

Aim

The goal of this course, which is a combination of lectures and lab assignments, is to have a hands-on experience on basic concepts and new developments in hardware security, by combining both theory and practice in a coherent course. The theoretical concepts for each topic will be presented to the students in form of lectures, followed by a set of lab assignments on both hardware and software platforms to be performed by the students for each topic.