Short Bio

Maryam received her Bachelor's and Master's degrees from the University of Tehran in the fields of Electrical Engineering-Digital Systems and Electrical Engineering-Digital Electronic Systems, respectively. Her bachelor's thesis was on Using Embedded Processors for Cryptocurrency Mining. During her master's thesis, she worked on Testing Accelerator-based Architectures with the supervision of Professor Zain Navabi. In September 2022, she joined the CDNC group at the Karlsruhe Institute of Technology (KIT) as a PhD student under the supervision of Professor Mehdi Tahoori. Her areas of interest include Silicon Lifecycle Management (SLM), Silent Data Corruption (SDC), RISC-V processors, FPGAs, testing, and deep learning.

Publications

Conferences
S. M. Ghasemi, S. Meschkov, J. Krautter, D. R. E. Gnad and M. Tahoori Enabling In-field Parametric Testing for RISC-V Cores in International Test Conference (ITC), Anaheim, USA, 2023.
S. M. Ghasemi, S. Meschkov, J. Krautter, D. R. E. Gnad and M. Tahoori SLM ISA and Hardware Extensions for RISC-V Processors in IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS), Crete, Greece, 2023.
S. M. Ghasemi, S. Meschkov, J. Krautter, D. R. E. Gnad and M. Tahoori In-field Detection of Small Delay Defects and Runtime Degradation using On-Chip Sensors in Design, Automation and Test in Europe Conference (DATE'24), Valencia, Spain, 2024.
S. M. Ghasemi, J. Krautter, T. Gheshlaghi, S. Meschkov, D. R. E. Gnad and M. Tahoori Degradation Monitoring Through Software-controlled On-chip Sensors for RISC-V in IEEE European Test Symposium (ETS), Hague, Netherlands, 2024.

Former Publications

N. Nosrati, S. M. Ghasemi, M. Sadeghipour Roodsari and Z. Navabi
Concurrent Error Detection for LSTM Accelerators
in IEEE European Test Symposium (ETS), Barcelona, Spain, 2022.

M. Sabet, A. Ramezani and S. M. Ghasemi
COVID-19 Detection in Cough Audio Dataset Using Deep Learning Model
in International Conference on Control, Instrumentation and Automation (ICCIA), 2022.

M. Rajabalipanah, S. M. Ghasemi, N. Nosrati, K. Basharkhah, S. Yousefzadeh and Z. Navabi
Reducing DFT hardware overhead by use of a test microprogram in a microprogrammed hardware accelerator
in IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), Frascati, Italy, 2020.

S. Yousefzadeh, K. Basharkhah, N. Nosrati, M. Rajabalipanah, S. M. Ghasemi and Z. Navabi
Reconfiguration of Embedded Accelerators by Microprogramming for Intensive Loop Computations
in International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS), Novi Sad, Serbia, 2020.

S. M. Ghasemy, M. Rajabalipanah, S. Sarmadi and Z. Navabi
SCOAP-based Directed Random Test Generation for Combinational Circuits
in IEEE East-West Design & Test Symposium (EWDTS), Batumi, Georgia, 2019.