M.Sc. Sina Bakhtavari Mamaghani
- PhD Student
- room: A3.26
- phone: +49 721 608 44858
- fax: +49 721 608 43962
- sina mamaghani ∂does-not-exist.kit edu
Short Bio
Sina Bakhtavari Mamaghani received his B.Sc. (2018) and M.Sc. (2021) degrees as a top-ranked student from the Departments of Electrical Engineering and Computer Science and Engineering at Shahid Beheshti University, Tehran, Iran. Since February 2022, he has been a Ph.D. student at the CDNC group of Prof. Mehdi Tahoori at KIT University, Karlsruhe, Germany. His research interests include the reliability and testability of emerging memory technologies.
Publications
| Patents | |
|---|---|
| J. Yun, M. Keim, S. B. Mamaghani, C. Münch, and M. Tahoori Memory built-in self-test with automated detection of magnetic tunnelling junction degradation for repair US patent, PCT/US2023/018666, submitted 2023. |
| Conferences | |
|---|---|
| S. B. Mamaghani, J. Yun, M. Keim, and M. Tahoori MBIST-guided Reliability Improvement Scheme for SRAM-based Computation in Memory 2025 IEEE European Test Symposium (ETS), May 26 2025. | |
| S. B. Mamaghani, J. Yun, M. Keim, and M. Tahoori MBIST-based MRAM defect screening for safety-critical applications 2024 IEEE International Test Conference (ITC), Nov 3 2024. | |
| J. Yun, S. B. Mamaghani, M. Tahoori, C. Münch, and M. Keim MBIST-based weak bit screening method for embedded MRAM, 2024 IEEE European Test Symposium (ETS), May 10 2024. | |
| S. B. Mamaghani, J. Yun, M. Keim, and M. Tahoori Multi-Level Reference for Test Coverage Enhancement of Resistive-Based NVM 2024 IEEE 42nd VLSI Test Symposium (VTS), Apr 22 2024. | |
| Priyanjana Pal♣, Haibin Zhao♣, Maha Shatta♣, Michael Hefenbrock, Sina Bakhtavari Mamaghani, Sani Nassif, Michael Beigl, Mehdi B. Tahoori Analog Printed Spiking Neuromorphic Circuit in 27th Design, Automation and Test in Europe Conference (DATE'24), 2024. | |
| S. B. Mamaghani, C. Münch, J. Yun, M. Keim, and M. B. Tahoori Smart Hammering: A practical method of pinhole detection in MRAM memories 2023 Design, Automation, Test in Europe Conference Exhibition (DATE), Apr 2023. | |
| Sina Bakhtavari Mamaghani, Priyanjana Pal, Mehdi Baradaran Tahoori A Dynamic Testing Scheme for Resistive-Based Computation-In-Memory Architectures in 29th Asia and South Pacific Design Automation Conference, ASP-DAC, 2024. |
| Former Publications |
|---|
| S. Bakhtavari Mamaghani, M. H. Moaiyeri, and G. Jaberipur, Design of an efficient fully nonvolatile and radiation-hardened majority-based magnetic full adder using FinFET/MTJ Microelectronics Journal, vol. 103. Elsevier BV, Sep. 2020. |
| S. Bakhtavari Mamaghani, F. Eslaminasab, and A. Yazdanpanah Goharrizi Armchair graphene nanoribbons: A synthesis precision study 2017 Iranian Conference on Electrical Engineering (ICEE), Tehran, Iran, May 2017 |
| R. Rajaei and S. Bakhtavari Mamaghani A Nonvolatile, Low-Power, and Highly Reliable MRAM Block for Advanced Microarchitectures IEEE Transactions on Device and Materials Reliability, vol. 17, no. 2, pp. 472–474, Jun. 2017. |
| R. Rajaei and S. Bakhtavari Mamaghani Ultra-Low Power, Highly Reliable, and Nonvolatile Hybrid MTJ/CMOS Based Full-Adder for Future VLSI Design IEEE Transactions on Device and Materials Reliability, vol. 17, no. 1, pp. 213–220, Mar. 2017 |
| R. Rajaei, S. Bakhtavari Mamaghani, and F. Eslaminasab Radiation Hardening by Design for Nonvolatile Magnetic Flip-Flops The 1st International Conference on New Research Achievements in Electrical and Computer Engineering (ICNRAECE), Tehran, Iran, 2016. Best Paper award |