Notes

All course material will be made available to the students via a git-repository throughout the course.

4 SWS / 6 ECTS = 180h

Please note this course has a limited amount of participants, you have to sign it up in the campus system!

There are limited slots and the registration is handled in a first-come, first-served manner. So make sure you sign-up as early as possible. We can only consider registrations with the correct documents or from the online system ( https://campus.studium.kit.edu/exams/index.php )

Regular CS Students:

For SPO 2008, please sign up the generic container module "Informatik Praktikum", there is 1, 2 and 3. Please try to sign up the one with 3 ECTS. If this is unavailable you can also sign one up with non-matching ECTS, which can then be corrected later. Unfortunately we have no live feedback on that, so please, at the same time, write a mail with a screenshot to cdnc@itec.kit.edu so we can reserve a seat for you in the lab.

For SPO 2015 please sign up the according FPGA programming module. If this does not work, you might need to add it to your Studienplan first, before sign-up, otherwise go to Studienbüro.

If there are any problems with sign-up, the usual practice is to go to the Studienbüro and they will help you sign-up. They probably want to know the name of the lab "FPGA programming lab". (Opening TImes, Studiengangsspezifische Anliegen, https://www.sle.kit.edu/wirueberuns/studierendenservice_oeffnungszeiten.php )

Erasmus/Exchange students or other faculties:

If you are from other faculties (e.g. electrical engineering "Elektrotechnik"), you need to register by the desired method of your faculty. We have no knowledge how they handle it. Please contact us after correctly registering it with the required details, so we can make sure that we have a seat reserved for you.

If you are Erasmus/Exchange student, you have to bring a form "Anerkennung von Leistungen". You have to collect a form from Informatik Studiengangsservice ( http://www.informatik.kit.edu/iss.php ) for "Prüfungszulassung", on which the specific Prüfung "FPGA programming lab" is written, and bring it to Ms. Schroeder Piepka ( http://cdnc.itec.kit.edu/21_121.php ). Only after we received this document here, we can reserve a seat for you.

Prerequisites

Digital Logic Design (Lecture Technische Informatik)

Description

Security is a major concern for a variety of domains like embedded and cyber-physical systems in which threats in hardware and software components may pose catastrophic consequences. Software security has been studied extensively, since the majority of security attacks were typically at the software level. However, currently hardware becomes the Achilles heel for on-chip system security as recent events show. There is evidence of hardware security breaches and hence, there is a growing emphasize in hardware security from academic, industry, and government sectors. In this regard, physical attacks, side-channel analysis and fault-injection attacks for security-enabled application domains is becoming a real-world challenge.

Content of teaching

1. Hardware security primitives (PUF, TRNG)

2. Hardware Implementation of encryption modules (AES)

3. Passive Attack with side channel (on AES)

4. Active fault attack (on simple circuits, if feasible also on AES)

Entry requirements

Lab "FPGA Programming" is helpful

Workload

Each slot will be 1.5h + 1.5h, and will be done at CDNC lab once per week. In the first 1.5h either the lecture is presented, the lab assignment is explained or the students present assignment results, depending the schedule of that week. The second 1.5h will be used by the students to continue on implementing the assignment.

Target audience

Master

Aim

The goal of this course, which is a combination of lectures and lab assignments, is to have a hands-on experience on basic concepts and new developments in hardware security, by combining both theory and practice in a coherent course. The theoretical concepts for each topic will be presented to the students in form of lectures, followed by a set of lab assignments on both hardware and software platforms to be performed by the students for each topic.