Chair of Dependable Nano Computing (CDNC)

Digital Design and Test Automation Flow

Prerequisites

Empfehlungen:

  • Grundlegende Kenntnisse in C/C++
  • Grundlegende Englischkenntnisse
  • Grundlegende Kenntnisse über Transistoren
Content of teaching

Electronic Design Automation (EDA) is used to develop nearly all novel electronic systems that we use in our daily lives, such as smartphones or laptops. In order to manage the high complexity of these systems, all steps in the design and verification phases are done automatically with the help of EDA tools.

The objective of this lab is to have a hands-on practice on major steps in digital design and test automation flow, from system-level specification to physical design and verification, using industrial EDA toolsets which are predominantly used in the industry and academia. The students will work on some sample designs and go through all major design and test steps, one by one, in different sessions of the lab. So, by the end of this lab, they become familiar with the steps and tool chain in the digital design and test automation flow. The topics include system-level specification and simulation; high-level synthesis; logic-level synthesis and simulation; design for testability; test pattern generation and fault simulation; physical design and verification; timing analysis and closure; area, delay, and power estimation and analysis.

Annotation

Die Veranstaltung findet in deutsch und englisch statt.

Workload

4 SWS / 3 ECTS

Aim

The object of this lab is to have a hands-on practice on major steps in digital design and test automation flow, from system-level specification to physical design and verification.

Exam description

Die Erfolgskontrolle erfolgt unbenotet als Erfolgskontrolle anderer Art nach § 4 Abs. 2 Nr. 3 SPO. Die Leistungskontrolle erfolgt dabei kontinuierlich für die einzelnen Projekte sowie durch eine Abschlusspräsentation. Die Bewertung ist "bestanden" / "nicht bestanden.