Chair of Dependable Nano Computing (CDNC)
Anteneh Gebregiorgis

Dr. -Ing. Anteneh Gebregiorgis

  • Researcher
  • group: Dependable Computing

Short Bio

Anteneh Gebregiorgis received his PhD degree in Computer Science from Karlsruhe Institute of Technology (KIT), Germany, in 2019.  Currently, he is a researcher in the field of neuromorphic computing at the chair of Dependable Nano Computing, KIT. From 2017 to 2018 he was a visiting scholar with  the nanoelectronics research laboratory, Purdue University, where he was working on  designing energy-efficient neuromorphic architectures. His research interest includes machine learning, neuromorphic computing, architectures for ultra-low power design, reliability analysis and variability assessment for low power processors and memory components.

 

Publication:

16. A. Gebregiorgis, and M.B. Tahoori "Testing of Neuromorphic Circuits: Structural Vs Functional", In Proceedings of International Test Conference (ITC), 2019, USA.

15. A. Gebregiorgis, and M.B. Tahoori, "Test Pattern Generation for Approximate Circuits Based on Boolean Satisfiability",  in proceedings of Design, Automation & Test in Europe (DATE), 2019, Italy.

14. G. Tshagharyan, G. Harutyunyan, Y. Zorian, A. Gebregiorgis, M.S. Golanbari, R. Bishnoi, and M.B. Tahoori, "Modeling and Testing of Aging Faults in FinFET Memories for Automotive Applications", In Proceedings of International Test Conference (ITC), 2018, USA.

13. A. Gebregiorgis, and M.B. Tahoori, "Reliability and Performance Challenges of Ultra-Low Voltage Caches: A Trade-off Analysis", in proceedings of the IEEE International On-Line Testing Symposium (IOLTS), 2018, Spain.

12. A. Gebregiorgis, R. Bishnoi, and M.B. Tahoori, "A Comprehensive Reliability Analysis Framework for NTC Caches: A System to Device Approach", in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2018.

11. A. Gebregiorgis, R. Bishnoi, and M.B. Tahoori, "Spintronic Normally-off Heterogeneous System-on-Chip Design",  in proceedings of Design, Automation & Test in Europe (DATE), 2018, Germany.

10. M.S. Golanbari, A. Gebregiorgis, E. Moradi, S. Kiamehr, and M.B. Tahoori, "Balancing Resiliency and Energy Efficiency of Functional Units in Ultra-low Power Systems", in Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC), 2018, Korea. (Invited Paper)

9. A. Gebregiorgis, and M.B. Tahoori, "Fine-Grained Energy-Constrained Microprocessor Pipeline Design", in IEEE Transactions on Very Large Scale Integration Systems (TVLSI), 2017.

8. A. Gebregiorgis, and M.B. Tahoori, "Reliability Analysis and Mitigation of Near Threshold Caches", in proceedings of the IEEE International On-Line Testing Symposium (IOLTS), 2017, Greece (Invited paper).

7. A. Gebregiorgis, S. Kiamehr, and M.B. Tahoori, "Error Propagation Aware Timing Relaxation For Approximate Near Threshold Computing", in Proceedings of Design Automation Conference (DAC), 2017, USA.

6. M. S. Golanbari, S. Kiamehr,  F. Oboril, A. Gebregiorgis, and M. B. Tahoori, "Post-Fabrication Calibration of Near-Threshold Circuits for Energy Efficiency", in Proceedings of the International Symposium on Quality Electronic Design (ISQED), 2017, USA.

5. M. S. Golanbari, A. Gebregiorgis, F. Oboril, S. Kiamehr, and M. B. Tahoori, "A Cross-Layer Approach for Resiliency and Energy Efficiency in Near Threshold Computing", in proceedings of IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2016, USA (Invited paper).

4. A.Gebregiorgis, M. Golanbari, S. Kiamehr, F. Oboril, and M.B. Tahoori, "Maximizing Energy Efficiency in NTC by Variation-Aware Microprocessor Pipeline Optimization", International Symposium on Low Power Electronics and Design (ISLPED), 2016, USA.

3. A. Gebregiorgis, F. Oboril, M.B. Tahoori, and S. Hamdioui, "Instruction Cache Aging Mitigation Through Instruction Set Encoding", in Proceedings of the International Symposium on Quality Electronic Design (ISQED), 2016, USA.

2. A. Gebregiorgis, S. Kiamehr, F. Oboril, R. Bishnoi, and M.B. Tahoori, "A Cross-Layer Analysis of Soft Error, Aging and Process Variation in Near Threshold Computing", in Proceedings of Design, Automation & Test in Europe (DATE), 2016, Germany.

1. A. Gebregiorgis, M. Ebrahimi, S. Kiamehr, F. Oboril, S. Hamdioui, and M.B. Tahoori, "Aging Mitigation in Memory Arrays Using Self-controlled Bit-flipping Technique", in Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC), 2015, Japan.

 

Master Thesis
"Aging Mitigation Schemes for Embedded Memories."
Delft Univesity of Technology, Delft, Netherlands, 2014

Bachelor Thesis
"Desing and Implementation of Digital Signatures Using RSA in C"
Mekelle Institute of Technology, Mekelle, Ethiopia, 2010