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Gabriel Cadilha Marques

M.Sc. Eng. Gabriel Cadilha Marques

PhD Student
group: Printed Electronics
office hours: 9:00-18:00
room: A.3.22
phone: +49 721 608 47658
fax: +49 721 608 43962
gabriel marquesOgd0∂kit edu

Short Bio

Gabriel Cadilha Marques was born in Nürnberg, Germany in year 1988. He received from Technische Hochschule Nürnberg Georg Simon Ohm his B.Eng. and M.Eng. degrees in Electrical Engineering and in Electronic and Mechatronic Systems respectively. For 2 years he did research on the areas of organic solar cells and organic DC-DC-converters. Since July 2014, he started working as a PhD student at the Chair of Dependable Nano Computing (CDNC) group in cooperation with the Institute of Nanotechnology (INT) on the field of printed electronics.



5. G. C. Marques, F. Rasheed, B. Breitung, H. Hahn, M. Tahoori and J. Aghassi-Hagmann, “Modeling and Characterization of Low Voltage, Inkjet Printed Devices and Circuits”, in Proceedings of the Large-area, Organic & Printed Electronics Convention (LOPEC), 2018, München.

4. G. C. Marques, F. Rasheed, J. Aghassi-Hagmann and M.B. Tahoori, "From Silicon to Printed Electronics: A Coherent Modeling and Design Flow  Approach Based on Printed Electrolyte Gated FETs", in Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC), 2018, Korea. (Invited Paper)

3. G. C. Marques, S. K. Garlapati, S. Dehm, S. Dasgupta, H. Hahn, M. Tahoori, and J. Aghassi-Hagmann, “Digital power and performance analysis of inkjet printed ring oscillators based on electrolyte-gated oxide electronics”, Applied Physics Letters (APL), vol. 111, no. 10, pp. 102103, 2017.

2. G. C. Marques, S. K. Garlapati, D. Chatterjee, S. Dehm, S. Dasgupta, J. Aghassi, and M. B. Tahoori, “Electrolyte-Gated FETs Based on Oxide Semiconductors: Fabrication and Modeling”, IEEE Transactions on Electron Devices, vol. 64, no. 1, pp. 279-285,  2017.

1. G. C. Marques, S. K. Garlapati, S. Dehm, S. Dasgupta, J. Aghassi and M. B. Tahoori, "Compact modeling of inkjet printed, high mobility, electrolyte-gated transistors", in 55. MPC Workshop, IEEE German Section Solid-State Circuit Society, 2016 Germany. (Best Paper Award).