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Digital Design and Test Automation Flow

Digital Design and Test Automation Flow
type: Praktikum (P) links:
semester: SS 2017
lecturer: Prof.Dr. Mehdi Baradaran Tahoori
sws: 4
lv-no.: 24907

Description

Electronic Design Automation (EDA) is used to develop nearly all novel electronic systems that we use in our daily lives, such as smartphones or laptops. In order to manage the high complexity of these systems, all steps in the design and verification phases are done automatically with the help of EDA tools.
The objective of this lab is to have a hands-on practice on major steps in digital design and test automation flow, from system-level specification to physical design and verification, using industrial EDA toolsets which are predominantly used in the industry and academia. The students will work on some sample designs and go through all major design and test steps, one by one, in different sessions of the lab. So, by the end of this lab, they become familiar with the steps and tool chain in the digital design and test automation flow. The topics include system-level specification and simulation; high-level synthesis; logic-level synthesis and simulation; design for testability; test pattern generation and fault simulation; physical design and verification; timing analysis and closure; area, delay, and power estimation and analysis.

Beschreibung

Electronic Design Automation (EDA) wird benutzt um fast alle neuen elektronischen Systeme unseres täglichen Lebens, wie die Chips in z.B. Smartphones und Laptops, zu entwickeln. Um die hohe Komplexität dieser Systeme handhaben zu können, werden alle Schritte in den Design und Verifikationsphasen mit Hilfe von EDA Tools automatisiert.
Das Ziel dieses Praktikums ist es Erfahrung mit den wesentlichen Schritten im Digital Design und der Test Automatisierung zu erlangen. Dies startet bei der System-Level Spezifizierung bis zum physischen Design und Verifikation mit den EDA Werkzeugen die in der Industrie und der akademischen Welt gleichermaßen genutzt werden. Die Studenten arbeiten an einem Design-Beispiel und werden nach und nach in den einzelnen Praktikums-Terminen durch die wesentlichen Design- und Test-Schritte geleitet. Am Ende des Praktikums werden sie also mit den Schritten und einer Reihe von Werkzeugen im Digital Design und der Testautomatisierung bekannt sein. Die Themen enthalten System-Level Specification and Simulation; High-Level Synthesis; Logic-Level Synthesis and Simulation; Design for Testability; Test Pattern Generation and Fault Simulation; Physical Design and Verification; Timing Analysis and Closure; Area, Delay, and Power Estimation and Analysis.

Workload
4 SWS / 3 ECTS
Time
One full week some time after the lectures.

Lab Week

31.07.2017 - 04.08.2017

Aim
The object of this lab is to have a hands-on practice on major steps in digital design and test automation flow, from system-level specification to physical design and verification.

Registrierung / Registration

There are limited slots and the registration is handled in a first-come, first-served manner. So make sure you sign-up as early as possible. We can only consider registrations with the correct documents or from the online system ( https://campus.studium.kit.edu/exams/index.php )

Regular CS Students:

For SPO 2008, please sign up the generic container module "Informatik Praktikum", there is 1, 2 and 3. Please try to sign up the one with 3 ECTS. If this is unavailable you can also sign one up with non-matching ECTS, which can then be corrected later. Unfortunately we have no live feedback on that, so please, at the same time, write a mail with a screenshot to cdnc@itec.kit.edu so we can reserve a seat for you in the lab.

For SPO 2015 please sign up the according FPGA programming module. If this does not work, you might need to add it to your Studienplan first, before sign-up, otherwise go to Studienbüro.

If there are any problems with sign-up, the usual practice is to go to the Studienbüro and they will help you sign-up. They probably want to know the name of the lab "FPGA programming lab". (Opening TImes, Studiengangsspezifische Anliegen, https://www.sle.kit.edu/wirueberuns/studierendenservice_oeffnungszeiten.php )

Erasmus/Exchange students or other faculties:

If you are from other faculties (e.g. electrical engineering "Elektrotechnik"), you need to register by the desired method of your faculty. We have no knowledge how they handle it. Please contact us after correctly registering it with the required details, so we can make sure that we have a seat reserved for you.

If you are Erasmus/Exchange student, you have to bring a form "Anerkennung von Leistungen". You have to collect a form from Informatik Studiengangsservice ( http://www.informatik.kit.edu/iss.php ) for "Prüfungszulassung", on which the specific Prüfung "FPGA programming lab" is written, and bring it to Ms. Schroeder Piepka ( http://cdnc.itec.kit.edu/21_121.php ). Only after we received this document here, we can reserve a seat for you.

Contact for further questions: cdnc@itec.kit.edu

Supervisor

Prof. Dr. Mehdi B. Tahoori

Nour Sayed, Farhan Rasheed