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Conferences and Journals

2018

Journals:
  1. A. Vijayan, S. Kiamehr, F. Oboril, K. Chakrabarty, and M.B. Tahoori, "Workload-aware Static Aging Monitoring and Mitigation of Timing-critical Flip-flops", in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2018.

 

Conferences:
  1. A. T. Erozan, M. S. Golanbari, R. Bishnoi,  J. Aghassi-Hagmann, and M. B. Tahoori, "Design and Evaluation of Physical Unclonable Function for Inorganic Printed Electronics",  in proceedings of the International Symposium on Quality Electronic Design (ISQED), 2018, USA.
  2. G. C. Marques, F. Rasheed, B. Breitung, H. Hahn, M. Tahoori and J. Aghassi-Hagmann, “Modeling and Characterization of Low Voltage, Inkjet Printed Devices and Circuits”, in proceedings of the Large-area, Organic & Printed Electronics Convention (LOPEC), 2018, München.
  3. A. Gebregiorgis, R. Bishnoi, and M.B. Tahoori, "Spintronic Normally-off Heterogeneous System-on-Chip Design",  in proceedings of Design, Automation & Test in Europe (DATE), 2018, Germany.
  4. F. Schellenberg, D.R.E. Gnad, A. Moradi, M. B. Tahoori, "An Inside Job: Remote Power Analysis Attacks on FPGAs", in proceedings of Design, Automation & Test in Europe (DATE), 2018, Germany.
  5. M.B. Tahoori, S. Mohanachandran Nair, R. Bishnoi, S. SENNI, J. Mohdad, F. Mailly, L. Torres, P. Benoit, A. Gamatie, P. Nouet, K. Jabeur, P. Vanhauwaert, A. Atitoaie, I. Firastrau, G. Di Pendina, and G. Prenat, "Using Multifunctional Standardized Stack as Universal Spintronic Technology for IoT", in proceedings of Design, Automation & Test in Europe (DATE), 2018, Germany.
  6. C. Münch, R. Bishnoi, and M.B. Tahoori, "Multi-Bit Non-Volatile Spintronic Flip-Flop",  in proceedings of Design, Automation & Test in Europe (DATE), 2018, Germany.
  7. S. Mohanachandran Nair, R. Bishnoi, and M. B. Tahoori, "Parametric Failure Modeling and Yield Analysis for STT-MRAM",  in proceedings of Design, Automation & Test in Europe (DATE), 2018, Germany.
  8. N. Sayed, R. Bishnoi,  F. Oboril, and M. B. Tahoori, "A Cross-layer Adaptive Approach for Performance and Power Optimization in STT-MRAM", in proceedings of Design, Automation & Test in Europe (DATE), 2018, Germany.
  9. M.S. Golanbari, A. Gebregiorgis, E. Moradi, S. Kiamehr, and M.B. Tahoori, "Balancing Resiliency and Energy Efficiency of Functional Units in Ultra-low Power Systems", in Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC), 2018, Korea. (Invited Paper)
  10. G. C. Marques, F. Rasheed, J. Aghassi-Hagmann and M.B. Tahoori, "From Silicon to Printed Electronics: A Coherent Modeling and Design Flow  Approach Based on Printed Electrolyte Gated FETs", in Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC), 2018, Korea. (Invited Paper)
  11. N. Sayed, S. Mohanachandran Nair, R. Bishnoi, and M.B. Tahoori, "Process Variation and Temperature Aware Adaptive Scrubbing for Retention Failures in STT-MRAM", in Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC), 2018, Korea.

2017

Journals:
  1. A. Gebregiorgis, and M.B. Tahoori, "Fine-Grained Energy-Constrained Microprocessor Pipeline Design", in IEEE Transactions on Very Large Scale Integration Systems (TVLSI), 2017.
  2. Shengcheng Wang, Taeyoung Kim, Zeyu Sun, Sheldon X.-D. Tan, and Mehdi B. Tahoori, "Recovery-aware Proactive TSV Repair for Electromigration Lifetime Enhancement in 3D ICs", in IEEE Transactions on Very Large Scale Integration Systems (TVLSI), 2017.
  3. S. Mohanachandran Nair, R. Bishnoi, M. S. Golanbari, F. Oboril, F. Hameed, and M. B. Tahoori, "VAET-STT: A Variation Aware STT-MRAM Analysis and Design Space Exploration Tool", in IEEE Transcactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2017.
  4. D. Alexanderscu, M. Altun, L. Anghel, A. Bernasconi, V. Ciriani, L. Frontini, and M.B. Tahoori "Logic Synthesis and Testing Techniques for Switching Nano-Crossbar Arrays", in Microprocessors and Microsystems, Vol. 54, 2017.
  5. G. C. Marques, S. K. Garlapati, S. Dehm, S. Dasgupta, H. Hahn, M. Tahoori, and J. Aghassi-Hagmann, “Digital power and performance analysis of inkjet printed ring oscillators based on electrolyte-gated oxide electronics”, Applied Physics Letters (APL), vol. 111, no. 10, pp. 102103, 2017.
  6. S. Wang, and M.B. Tahoori, "Electromigration-aware Local-Via Allocation in Power/Ground TSVs of 3D ICs", In IEEE Transactions on Very Large Scale Integration Systems (TVLSI), 2017.
  7. A. Vijayan, S. Kiamehr, M. Ebrahimi, K. Chakrabarty, and M.B. Tahoori, "Online Soft-Error Vulnerability Estimation for Memory Arrays and Logic Cores", in IEEE Transcactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2017.
  8. N. Khoshavi, R. A. Ashraf, R. F. DeMara, S. Kiamehr, F. Oboril, and M.B. Tahoori, "Contemporary CMOS Aging Mitigation Techniques: Survey, Taxonomy, and Methods", in  Integration the VLSI journal, 2017
  9. S. Kiamehr, M. Ebrahimi, M. S. Golanbari, and M.B. Tahoori, "Temperature-aware Dynamic Voltage Scaling to Improve Energy Efficiency of Near-Threshold Computing" , in IEEE Transactions on Very Large Scale Integration Systems (TVLSI), 2017.
  10. N. Rohbani, M. Ebrahimi, S.G. Miremadi, and M.B. Tahoori, "Bias Temperature Instability Mitigation via Adaptive Cache Size Management", in IEEE Transactions on Very Large Scale Integration Systems (TVLSI), 2017.
  11. G. C. Marques, S. K. Garlapati, D. Chatterjee, S. Dehm, S. Dasgupta, J. Aghassi, and M. B. Tahoori, "Electrolyte-Gated FETs Based on Oxide Semiconductors: Fabrication and Modeling", IEEE Transactions on Electron Devices (ED), vol. 64, no. 1, pp. 279-285,  2017.
  12. R. Bishnoi, F. Oboril and M.B. Tahoori, "Design of Defect and Fault Tolerant Non-Volatile Spintronic Flip-Flops", in IEEE Transactions on Very Large Scale Integration Systems (TVLSI), 2017.
  13. A. Vijayan, A. Koneru, S. Kiamehr, K. Chakrabarty, and M.B. Tahoori, "Fine-Grained Aging-Induced Delay Prediction Based on the Monitoring of Run-Time Stress", in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2017.

 

Conferences:
  1. K. Iwata, A. Gharehbaghi, M.B. Tahoori, and M. Fujita, "Post Silicon Debugging of Electrical Bugs Using Trace Buffers",  in Proceedings of Asian Test Symposium (ATS), 2017, Taiwan.
  2. R. Elnaggar, K. Chakrabarty, and M.B. Tahoori, "Run-Time Hardware Trojan Detection Using Performance Counters", in Proceedings of International Test Conference (ITC), 2017, USA.
  3. S. Wang, Z, Sun, Y, Cheng, S.X.-D Tan, and M. B. Tahoori, "Leveraging Recovery Effect to Reduce Electromigration Degradation in Power/Ground TSV", In Proceedings of IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2017, USA (Invited Paper).
  4. D.R.E. Gnad, F. Oboril, M.B. Tahoori, "Voltage Drop-based Fault Attacks on FPGAs using Valid Bitstreams", International Conference on Field-Programmable Logic and Applications (FPL), 2017, Belgium. (Best Paper Award)
  5. A. Gebregiorgis, and M.B. Tahoori, "Reliability Analysis and Mitigation of Near Threshold Caches", in proceedings of the IEEE International On-Line Testing Symposium (IOLTS), 2017, Greece (Invited paper).
  6. M.S. Golanbari, and M.B. Tahoori, "Design Flows for Resilient Energy Efficient Systems", in proceedings of the IEEE International On-Line Testing Symposium (IOLTS), 2017, Greece (Invited paper).
  7. S. Mittal, R. Bishnoi, F. Oboril, H. Wang, M.B. Tahoori, A. Jog and J.S. Vetter, "Architecting SOT-RAM Based GPU Register File", in IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2017, Germany.
  8. M.B. Tahoori, S.M. Nair, R. Bishnoi, S. Senni, J. Mohdad, F. Mailly, L. Torres, P. Benoit, P. Nouet, R. Ma, M. Kreißig, F. Ellinger, K. Jabeur, P. Vanhauwaert, G. Di Pendina and G. Prenat, "GREAT: heteroGeneous integRated magnetic tEchnology using multifunctional standardized sTack", in IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2017, Germany.
  9. A. Gebregiorgis, S. Kiamehr, and M.B. Tahoori, "Error Propagation Aware Timing Relaxation For Approximate Near Threshold Computing", in Proceedings of Design Automation Conference (DAC), 2017, USA.
  10. D. Weller, F. Oboril, D. Lukarski, J. Becker, and M.B. Tahoori, "Energy Efficient Scientific Computing on FPGAs using OpenCL", in Proceedings of the ACM/ SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA), 2017, USA.
  11. N. Sayed, F. Oboril, A. Shirvanian, R. Bishnoi, and M.B. and Tahoori, "Exploiting STT-MRAM for Approximate Computing", in proceedings of European Test Symposium (ETS), 2017, Cyprus.
  12. M. S. Golanbari, N. Sayed, M. Ebrahimi, M. H. Moshrefpour Esfahany, S. Kiamehr, and M.B. Tahoori, "Aging-Aware Coding Scheme for Memory Arrays", in proceedings of European Test Symposium (ETS), 2017, Cyprus.
  13. M. Altun, V. Ciriani, and M.B. Tahoori, "Computing with Nano-Crossbar Arrays: Logic Synthesis and Fault Tolerance", in Proceedings of Design, Automation & Test in Europe (DATE), 2017, Switzerland.
  14. S. Kiamehr, MS. Saber Golanbari, and M.B. Tahoori, "Leveraging Aging Effect to Improve SRAM-based True Random Number Generators", in Proceedings of Design, Automation & Test in Europe (DATE), 2017, Switzerland.
  15. N. Sayed, F. Oboril, R. Bishnoi, and M. B. Tahoori, "Leveraging Systematic Unidirectional Error-Detecting Codes for Fast STT-MRAM Cache", in proceedings of VLSI Test Symposium (VTS), 2017, USA.
  16. N. Sayed, M. Ebrahimi, R. Bishnoi, and M. B. Tahoori, "Opportunistic Write for Fast and Reliable STT-MRAM", in Proceedings of Design, Automation & Test in Europe (DATE), 2017, Switzerland (Invited Paper).
  17. M. S. Golanbari, S. Kiamehr,  F. Oboril, A. Gebregiorgis and M. B. Tahoori, "Post-Fabrication Calibration of Near-Threshold Circuits for Energy Efficiency", in Proceedings of the International Symposium on Quality Electronic Design (ISQED), 2017, USA.
  18. S. Wang, H. Zaho, S.X.-D Tan, and M. B. Tahoori, "Recovery-aware Proactive TSV Repair for Electromigration in 3D ICs", in Proceedings of Design, Automation & Test in Europe (DATE), 2017, Switzerland.
  19. S. Mohanachandran Nair, R. Bishnoi, M. S. Golanbari, F. Oboril, and M. B. Tahoori, "VAET-STT: A Variation Aware Estimator Tool for STT-MRAM based Memories", in Proceedings of Design, Automation & Test in Europe (DATE), 2017, Switzerland.
  20. A. Vijayan, S. Kiamehr, F. Oboril, K. Chakrabarty, and M.B. Tahoori, "Workload-aware Static Aging Monitoring of Timing Critical Flip-flops", in Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC), 2017, Japan. (Best Paper Candidate)

 

2016

 

Journals:
  1. A. Amouri, J. Hepp and M.B. Tahoori, "Built-in Self-Heating Thermal Testing of FPGAs", in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2016.
  2. G. Prenat, G.D. Pendina, K. Jabeur, P. Vanhauwaert, O. Boulle, M. Miron, G. Gaudin, F. Oboril, R. Bishnoi, M. Ebrahimi, M. Tahoori, K. Garello and P. Gambardella, "Ultra-Fast and High-Reliability SOT-MRAM: from Cache Replacement to Normally-o Computing", in IEEE Transactions on Multi-Scale Computing Systems (TMSCS), 2016.
  3. M. Ebrahimi, P.M.B. Rao, R. Seyyedi, M.B. Tahoori, "Low-cost Multiple Bit Upset Correction in SRAM-based FPGA Configuration Frames", in IEEE Transactions on Very Large Scale Integration Systems (TVLSI), 2016.
  4. L. Chen, M. Ebrahimi, and M.B. Tahoori, "Reliability-aware Resource Allocation and Binding in High Level Synthesis", in ACM Transaction on Design Automation of Electronic Systems (TODAES), 2016.
  5. R. Bishnoi, F. Oboril, M. Ebrahimi and M.B. Tahoori, "Self-timed Read and Write Operations in STT-MRAM", in IEEE Transactions on Very Large Scale Integration Systems (TVLSI), 2016.
  6. F. Ye, F. Firouzi, Y. Yang, K. Chakrabarty, and M.B. Tahoori, "On-chip Droop-induced Circuit Delay Prediction Based on Support-Vector Machines", in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2016.
  7. M. Ebrahimi, H. Asadi, R. Bishnoi, and M.B. Tahoori, ”Layout-based Modeling and Mitigation of Multiple Event Transients”, in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2016.
  8. R. Bishnoi, M. Ebrahimi, F. Oboril and M.B. Tahoori, "Improving Write Performance for STT-MRAM", IEEE Transactions on Magnetics (TMAG), 2016.

 

Conferences: 
  1. D. Alexandrescu, M. Altun, L. Anghel, A. Bernasconi, V. Ciriani, L. Frontini and M.B. Tahoori, "Synthesis and Performance Optimization of a Switching Nano-Crossbar Computer", Euromicro Conference on Digital System Design (DSD), 2016 
  2. D. R. E. Gnad, F. Oboril, S. Kiamehr and M. B. Tahoori, "Analysis of Transient Voltage Fluctuations in FPGAs", in International Conference on Field-Programmable Technology (FPT), 2016, China. (Best Paper Candidate)
  3. M. S. Golanbari, S. Kiamehr, and M. B. Tahoori, "Hold-time Violation Analysis and Fixing in Near-Threshold Region", International Workshop on Power And Timing Modeling, Optimization and Simulation (PATMOS), 2016, Germany.
  4. M. S. Golanbari, A. Gebregiorgis, F. Oboril, S. Kiamehr, and M. B. Tahoori, "A Cross-Layer Approach for Resiliency and Energy Efficiency in Near Threshold Computing", in proceedings of IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2016, USA (Invited paper).
  5. S. Wang, R. Wang, K. Chakrabarty, M. B. Tahoori, "Multicast Test Architecture and Test Scheduling for Interposer-based 2.5D ICs", in Asian Test Symposium (ATS), 2016, Japan (Invited Paper).
  6. M. Ebrahimi,  M. Rashvand, F. Kaddachi, M.B. Tahoori and G.Di Natale, "Revisiting Software-based Soft Error Mitigation Techniques via Accurate Error Generation and Propagation Models", in proceedings of the IEEE International On-Line Testing Symposium (IOLTS), 2016, Spain.
  7. M.B. Tahoori, Rob Aitken, Sriram R. Vangal and Bal Sandhu, "Test implications and challenges in near threshold computing", in proceedings of 34st VLSI Test Symposium (VTS), 2016, USA.
  8. Fabian Oboril, Azadeh Shirvanian and M.B. Tahoori, "Fault tolerant approximate computing using emerging non-volatile spintronic memories", in proceedings of 34st VLSI Test Symposium (VTS), 2016, USA.
  9. A. Gebregiorgis, M. Golanbari, S. Kiamehr, F. Oboril and M.B. Tahoori, "Maximizing Energy Efficiency in NTC by Variation-Aware Microprocessor Pipeline Optimization", International Symposium on Low Power Electronics and Design (ISLPED), 2016, USA.
  10. F. Oboril, F. Hameed, R. Bishnoi, A. Ahari, H. Naeimi and M.B. Tahoori, "Normally-OFF STT-MRAM Cache with Zero-Byte Compression for Energy Efficient Last-Level Caches", International Symposium on Low Power Electronics and Design (ISLPED), 2016, USA.
  11. S. Kiamehr, P. Weckx, M.B. Tahoori, B. Kaczer, H. Kukner, P. Raghavan, G. Groeseneken, F. Catthoor, "The Impact of Process Variation and Stochastic Aging in Nanoscale VLSI", in Proceedings of International Reliability Physics Symposium (IRPS), 2016, USA.
  12. S. Kiamehr, M. Ebrahimi and M.B. Tahoori, "Temperature-aware Dynamic Voltage Scaling for Near-Threshold Computing", in Proceedings of Great Lakes Symposium on VLSI (GLSVLSI), 2016, USA.
  13. R. Bishnoi,  F. Oboril and M.B. Tahoori, "Low-Power Multi-Port Memory Architecture based on Spin Orbit Torque Magnetic Devices", in Proceedings of Great Lakes  Symposium on VLSI (GLSVLSI), 2016, USA.
  14. Gabriel C. Marques, Suresh K. Garlapati, Simone Dehm, Subho Dasgupta, Jasmin Aghassi and M. B. Tahoori, "ICompact modeling of inkjet printed, high mobility, electrolyte-gated transistors", in 55. Workshop on Microelectronics, IEEE German Section Solid-State Circuit Society, 2016, Germany (Best Paper Award).
  15. M. Ebrahimi, M.H. Moshrefpour, M.S. Golanbari, M.B. Tahoori, “Fault Injection Acceleration by Simultaneous Injection of Non-interacting Faults”, in Design Automation Conference (DAC), 2016, USA.
  16. M. Ebrahimi, M.B. Tahoori, “Cross-layer Approaches for Soft Error Modeling and Mitigation”, in Design Automation Conference (DAC), 2016, USA.
  17. A. Vijayan, A. Koneru, M. Ebrahimi, K. Chakrabarty, and M.B. Tahoori, "Online Soft-Error Vulnerability Estimation for Memory Arrays", in proceedings of 34st VLSI Test Symposium (VTS), 2016, USA.
  18. F. Hameed, M. Tahoori, "Architecting STT Last-Level-Cache for Performance and Energy Improvement", in Proceedings of the International Symposium on Quality Electronic Design (ISQED), 2016, USA.
  19. A. Gebregiorgis, F. Oboril, M.B. Tahoori, and S. Hamdioui, "Instruction Cache Aging Mitigation Through Instruction Set Encoding", in Proceedings of the International Symposium on Quality Electronic Design (ISQED), 2016, USA.
  20. S. Wang, K, Chakrabarty, M.B. Tahoori, "Thermal-aware TSV Repair for Electromigration in 3D ICs", in Proceedings of Design, Automation & Test in Europe (DATE), 2016, Germany.
  21. M.S. Golanbari, S. Kiamehr, M. Ebrahimi, and M.B. Tahoori, "Variation-aware Near Threshold Circuit Synthesis", in Proceedings of Design, Automation & Test in Europe (DATE), 2016, Germany.
  22. A. Gebregiorgis, S. Kiamehr, F. Oboril, R. Bishnoi, and M.B. Tahoori, "A Cross-Layer Analysis of Soft Error, Aging and Process Variation in Near Threshold Computing", in Proceedings of Design, Automation & Test in Europe (DATE), 2016, Germany.
  23. R. Bishnoi, F. Oboril and M.B. Tahoori, "Fault Tolerant Non-Volatile Spintronic Flip-Flop", in Proceedings of Design, Automation & Test in Europe (DATE), 2016, Germany.
  24. R. Bishnoi, F. Oboril and M.B. Tahoori, "Non-Volatile Non-Shadow Flip-Flop using Spin Orbit Torque for Efficient Normally-off Computing", in Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC), 2016, China.
  25. F. Kaddachi, M. Kooli, G. Di Natale, A. Bosio, M. Ebrahimi, M.B. Tahoori, "System-level Reliability Evaluation through Cache-aware Software-based Fault Injection", IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), 2016.
  26. R. Ashraf, N. Khoshavi, A. Alzahrani,  R.F. DeMara, S. Kiamehr, M. Tahoori, "Area-Energy Tradeoffs of Logic Wear-Leveling for BTI-induced Aging" in Proceedings of ACM International Conference on Computing Frontiers 2016.
 
Workshops:
  1. F. Oboril, R. Bishnoi, M. Ebrahimi, M.B. Tahoori, G. Di Pendina, K. Jabeur, and G. Prenat "Spin Orbit Torque memory for non-volatile microprocessor caches", International Workshop on Emerging Memory Solutions, 2016, Germany.

  2. F. Oboril, and M. B. Tahoori "Cross-Layer Approaches for an Aging-Aware Design Space Exploration of Microprocessors", Workshop on Early Reliability Modelling for Aging and Variability in Silicon Systems (ERMAVSS), 2016, Germany.

 

2015

 

Journals:
  1. F. Firouzi, F. Ye, K. Chakrabarty and M.B. Tahoori, "Aging- and variation-aware delay monitoring using representative critical path selection", accepted for publication in ACM Transaction on Design Automation of Electronic Systems (TODAES), 2015.
  2. F. Oboril, and M.B. Tahoori, "Exploiting Instruction Set Encoding for Aging-Aware Microprocessor Design", in ACM Transactions on Design Automation of Electronic Systems (TODAES), 2015.
  3. M. Ebrahimi, A. Evans, M.B. Tahoori, E. Costenaro, D. Alexandrescu, V. Chandra, R. Seyyedi, "Comprehensive Analysis of Sequential and Combinational Soft Errors in an Embedded Processor", in IEEE Transactions on Computer-Aided Design of  Integrated Circuits and Systems (TCAD), 2015.
  4. F. Oboril, R. Bishnoi, M. Ebrahimi and M.B. Tahoori, "Evaluation of Hybrid Memory Technologies using SOT-MRAM for On-Chip Cache Hierarchy", in IEEE Transactions on Computer-Aided Design of  Integrated Circuits and Systems (TCAD), 2015.
  5. L. Chen, M. Ebrahimi, M.B. Tahoori, "Formal Quantification of the Register Vulnerabilities to Soft Error in RTL Control Paths", Journal of Electronic Testing:  Theory and Applications (JETTA), Springer, 2015.
  6. S. Kiamehr, M. Ebrahimi, F. Firouzi, and M.B. Tahoori, "Extending Standard Cell Library for Aging Mitigation", in IET Computers & Digital Techniques, 2015.
  7. M. Ottavi, S. Pontarelli, D. Gizopoulos, M.K. Michael, L. Anghel, M. Tahoori, A. Paschalis, P. Reviriego, O. Bringman, V. Izosimov, H. Manhaeve, C. Strydis, S. Hamdioui, "Dependable Multicore Architectures at Nanoscale: the view from Europe," IEEE Design & Test, 2015.
  8. M. Glaß, H. Aliee, L. Chen, M. Ebrahimi, F. Khosravi, V. Kleeberger, A. Listl, D. Müller-Gritchneder, F. Oboril, U. Schlichtmann, M.B. Tahoori, J. Teich, N. Wehn, C. Weis, "Application-aware cross-layer reliability analysis and optimization", in it - Information Technology, 2015.

 

Conferences:
  1. A. Ahari, M. Ebrahimi, F. Oboril and M.B. Tahoori, "Improving Reliability, Performance, and Energy Efficiency of STT-MRAM with Dynamic Write Latency", in International Conference on Computer Design (ICCD), 2015, USA.
  2. M. Ebrahimi and M.B. Tahoori ,”Stepped Parity: A Low-cost Multiple Bit Upset Detection Technique”, Proceedings of International Test Conference (ITC), 2015, USA.
  3. M.B. Tahoori, A. Chatterjee, K. Chakrabarty, A. Koneru, A. Vijayan and D. Banerjee, "Self-awareness and self-learning for resiliency in real-time systems", to appear in Proc. IEEE International Online Test Symposium (IOLTS), 2015, Greece.
  4. A. Koneru, A. Vijayan, K. Chakrabarty, M.B. Tahoori, "Fine-Grained Aging Prediction Based on the Monitoring of Run-Time Stress Using DfT Infrastructure", in Proc. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2015, USA (Invited paper).
  5. S. Wang, K, Chakrabarty, M.B. Tahoori, "Novel Spare TSV Allocation for 3D-ICs Considering Defect Clustering Effect", accepted for publication in Proc. IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2015, USA (Best Paper Award).
  6. S. Wang, F. Firouzi, F. Oboril, M.B. Tahoori, "Deadspace-aware Power/Ground TSV Planning in 3D Floorplanning", in Proceedings of International Conference on Integrated Circuit Design and Technology (ICICDT), 2015, Belgium (Invited Paper).
  7. M. Ebrahimi, N, Sayed, M. Rashvand, M.B. Tahoori, "Fault Injection Acceleration by Architectural Importance Sampling", in proceedings of International Conference on Hardware-Software Codesign and System Synthesis (CODES+ISSS), 2015, Netherlands. 
  8. A. Ahari. M. Ebrahimi, M.B. Tahoori, "Energy Efficient Partitioning of Dynamic Reconfigurable MRAM-FPGAs", Proceedings of the 25th International Conference on Field Programmable Logic and Applications (FPL), 2015, UK.
  9. R. Aitken, E.H. Cannon, M. Pant, M.B. Tahoori, "Resiliency Challenges in sub-10nm Technologies", in proceedings of VLSI Test Symposium (VTS), 2015, USA.
  10. M.S. Golanbari, S. Kiamehr, M. Ebrahimi, M.B. Tahoori, "Aging Guardband Reduction through Selective Flip-Flop Optimization", in proceedings of European Test Symposium (ETS), 2015, Romania.
  11. A. Banaiyanmofrad, M. Ebrahimi, F. Oboril, M.B. Tahoori, N. Dutt, "Protecting Caches Against Multiple Bit Upsets Using Embedded Erasure Coding", in proceedings of European Test Symposium (ETS), 2015, Romania.
  12. L. Chen, M. Ebrahimi, M.B. Tahoori, "Reliability-aware Operation Chaining in High Level Synthesis", in proceedings of European Test Symposium (ETS), 2015, Romania.
  13. F. Firouzi, F. Ye, A. Vijayan, A. Koneru, K. Chakrabarty, M.B. Tahoori, "Re-using BIST for Circuit Aging Monitoring", in proceedings of European Test Symposium (ETS), 2015, Romania.
  14. M. S. Golanbari, S. Kiamehr, M. B. Tahoori, S. Nassif, "Analysis and Optimization of Flip-Flops Under Process and Runtime Variations", in Proceedings of the International Symposium on Quality Electronic Design (ISQED), 2015, USA.
  15. F. Oboril, J. Ewert, and M. B. Tahoori, “High-Resolution Online Power Monitoring for Modern Microprocessors,” in Proceedings of  Design, Automation & Test in Europe (DATE), 2015, France.
  16. R. Baranowski,  F. Firouzi, S. Kiamehr, C.Liu, M. Tahoori, H. Wunderlich, "On-Line Prediction of NBTI-induced Aging Rates", in Proceedings of Design, Automation & Test in Europe (DATE), 2015, France.
  17. F. Oboril, M. Ebrahimi, S. Kiamehr,  M.B. Tahoori, "Cross-Layer Resilient System Design Flow", in Proceedings of theInternational Symposium on Circuits and Systems (ISCAS), 2015, Portugal (Invited Paper)
  18. S. Wang, F.  Firouzi, F. Oboril, M.B. Tahoori, "Stress-aware P/G TSV Planning in 3D-ICs", in Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC), 2015, Japan.
  19. M. Ebrahimi, R. Seyyedi, L. Chen, M.B. Tahoori  , " Event-driven Transient Error Propagation: A Scalable and Accurate Soft Error Rate Estimation Approach", in Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC), 2015, Japan.
  20. A. Gebregiorgis, M. Ebrahimi, S. Kiamehr, F. Oboril, S. Hamdioui, M.B. Tahoori, "Aging Mitigation in Memory Arrays Using Self-controlled Bit-flipping Technique", in Proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC), 2015, Japan.

 

Workshops:
  1. M. S. Golanbari, S. Kiamehr, M. B. Tahoori, "Resilient Flip-Flop Design under Process and Runtime Variations", The 11th Workshop on Silicon Errors in Logic - System Effects (SELSE), 2015, USA.

 

 

2014

 

Journals:
  1. F. Oboril and M.B. Tahoori, "Aging-Aware Design of Microprocessor Instruction Pipelines", in IEEE Transactions on Computer-Aided Design of  Integrated Circuits and Systems (TCAD), 2014.
  2. M. Beste and M. Tahoori, "Effect of the Active Layer on Carbon Nanotube-based cells for Yield Analysis", in ACM Journal of Emerging Technologies (JETC), 2014.
  3. A. Herkersdorf, H. Aliee, M. Engel, M. Glaß, C. Gimmler-Dumont, J. Henkel, V. B. Kleeberger, M. A. Kochte, J. M. Kühn, D. Mueller-Gritschneder, S. R. Nassif, H. Rauchfuss, W. Rosenstielf, U. Schlichtmann, M. Shafique, M. B. Tahoori, J. Teich, N. Wehn, C. Weis, H.-J. Wunderlich, "Resilience Articulation Point (RAP): Cross-layer Dependability Modeling for Nanometer System-on-chip Resilience", in Elsevier Microelectronics Reliability Journal, 2014.
  4. R. Wille, R. Drechsler, M.B. Tahoori, "Introduction to the Special Issue on Reversible Computation", ACM Journal of Emerging Technologies (JETC), 11(2): 8, 2014.
  5. N. Dutt, and M.i Tahoori. "Introduction to Special Issue on Cross-layer Dependable Embedded Systems." ACM Transactions on Embedded Computing Systems (TECS), 2014.

 

Conferences:
  1. R. Bishnoi, M. Ebrahimi, F. Oboril and M.B. Tahoori , "Read Disturb Fault Detection in STT-MRAM", Proceedings of International Test Conference (ITC), 2014, USA.
  2. Fangming YE, F. Firouzi, K. Chakrabarty, M. Tahoori, "Chip Health Monitoring Using Machine Learning", Proceedings of Annual Symposium on VLSI (ISVLSI), 2014, USA (Invited Paper).
  3. A. Ahari, H. Asadi, and M. Tahoori, “Emerging Non-Volatile Memory Technologies for Future Low Power Reconfigurable System”, International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC), 2014, France (Invited Paper)
  4. F. Firouzi, , F. Ye, S. Kiamehr, K. Chakrabarty, and M. Tahoori. "Adaptive Mitigation of Parameter Variations." In Asian Test Symposium (ATS), 2014, China. (Invited Paper).
  5. A. Ahari, H. Asadi, B. Khaleghi, Z. Ebrahimi, and M. B. Tahoori, “Towards Dark Silicon Era in FPGAs Using Complementary Hard LogicDesign,” Proceedings of the 24th International Conference on Field Programmable Logic and Applications (FPL), 2014, Germany.
  6. A. Amouri, F. Bruguier, S. Kiamehr, P. Benoit, L. Torres and M. Tahoori, "Aging Effects in FPGAs: an Experimental Analysis", Proceedings of the 24th International Conference on Field Programmable Logic and Applications (FPL), 2014, Germany.
  7. M. Beste, S. Kiamehr, and M.B. Tahoori, "Physical Design of CNTFET-based Circuits for Yield Improvement" International New Circuits and Systems Conference (NEWCAS), 2014, Canada (Invited Paper).
  8. S. Kiamehr, T. Osiecki, M.B. Tahoori, Sani Nassif, "Radiation-Induced Soft Error Analysis of SRAMs in SOI FinFET Technology: A Device to Circuit Approach ", in Proceedings of Design Automation Conference (DAC), 2014, USA.
  9. P.M.B. Rao, M. Ebrahimi, R. Seyyedi, M. Tahoori, "Protecting SRAM-based FPGAs Against Multiple Bit Upsets Using Erasure Codes", Proceedings of Design Automation Conference (DAC), 2014, USA.
  10. L. Chen, M. Tahoori, "Reliability-aware Register Binding for Control-Flow Intensive Designs", Proceedings of Design Automation Conference (DAC), 2014, USA.
  11. L. Chen, M. Ebrahimi, M. Tahoori, "Quantitative Evaluation of Register Vulnerabilities in RTL Control Paths", Proceedings of the European Test Symposium (ETS), 2014, Germany.
  12. A. Amouri, J. Hepp, M. Tahoori, "Self-Heating Thermal-Aware Testing of FPGAs",  Proceedings of the 32nd IEEE VLSI Test Symposium (VTS), 2014, Napa, California, USA
  13. Fangming YE, F. Firouzi, Y. Yang, K. Chakrabarty, M. Tahoori, "On-Chip Voltage-Droop Prediction Using Support-Vector Machines", Proceedings of the 32nd IEEE VLSI Test Symposium (VTS), 2014, Napa, California, USA
  14. R. Bishnoi, F. Oboril, M. Ebrahimi,  and M. Tahoori, "Avoiding Unnecessary Write Operations in STT-MRAM for Low Power Implementation", in Proceedings of the International Symposium on Quality Electronic Design  (ISQED), 2014, USA
  15. M. Ebrahimi, A. Evans, M. Tahoori, R. Seyyedi, E. Costenaro and D. Alexandresc, "Comprehensive Analysis of Alpha and Neutron Particle-induced Soft Errors in an Embedded Processor at Nanoscales", in Proceedings of Design, Automation & Test in Europe (DATE), 2014, Germany (Best Paper Candidate).
  16. S. Wang, F. Firouzi, F. Oboril, M. Tahoori, "P/G TSV Planning for IR-drop Reduction in 3D-ICs", in Proceedings of Design, Automation & Test in Europe (DATE), 2014, Germany.
  17. R. Bishnoi, M. Ebrahimi, F. Oboril and M.B. Tahoori , "Asynchronous Asymmetrical Write Termination (AAWT) for a Low Power STT-MRAM", in Proceedings of Design, Automation & Test in Europe (DATE), 2014, Germany.
  18. A. Ahari, H. Asadi, B. Khaleghi, M. Tahoori, "A Power-Efficient Reconfigurable Architecture Using PCM Configuration Technology", in Proceedings of Design, Automation & Test in Europe (DATE), 2014, Germany.
  19. S. Kiamehr, F. Firouzi, M. Ebrahimi, M. Tahoori, "Aging-aware Standard Cell Library Design", in Proceedings of Design, Automation & Test in Europe (DATE), 2014, Germany.
  20. R. Bishnoi, M. Ebrahimi, F. Oboril and M. Tahoori , "Architectural Aspects in Design and Analysis of SOT-based Memories",  in proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC), 2014, Singapore (Invited Paper). 
  21. F. Oboril, M. Tahoori, "ArISE: Aging-aware Instruction Set Encoding for Lifetime Improvement", in proceedings of the Asia and South Pacific Design Automation Conference (ASPDAC), 2014, Singapore.
  22. M. Beste, S. Kiamehr, M. Tahoori, "Layout–aware Delay Variation Optimization for CNTFET–based Circuits", in proceedings of VLSI Design Conference (VLSID), 2014, India.

 

Workshops:
  1. S. Kiamehr,  M.B. Tahoori, "A Cross-Layer Approach for Soft Error Analysis of SRAMs in SOI FinFET Technology", The 10th Workshop on Silicon Errors in Logic – System Effects (SELSE), 2014, USA.
  2. P.M.B. Rao, A. Amouri, M. Tahoori, "Generation of Equivalent Configurations for Defect Tolerance and Yield Improvement of FPGAs", Third Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN'14),  2014, Dresden, Germany

 

2013

 

Journals:
  1. F. Oboril, F. Firouzi, S. Kiamehr, and M. Tahoori, "Negative Bias Temperature Instability-Aware Instruction Scheduling: A Cross-Layer Approach", Journal of Low Power Electronics. 9, 2013.
  2. L. Chen, M. Ebrahimi and M. Tahoori,"CEP: Correlated Error Propagation for Hierarchical Soft Error Analysis", Journal of Electronic Testing:  Theory and Applications (JETTA), Springer, 2013
  3. F. Firouzi, S. Kiamehr, M. Tahoori, "Power-aware Minimum NBTI Vector Selection using a Linear Programming Approach", in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2013.

 

Conferences:
  1. A. Amouri and M. Tahoori, "Degradation in FPGAs: Modeling, Monitoring and Mitigation", Proceedings of the IEEE International Conference on Field Programmable Logic and Applications (FPL), 2013, Porto, Portugal (PhD forum paper)
  2. M. Ebrahimi, F. Oboril, S. Kiamehr, M. Tahoori, "Aging-aware Logic Synthesis", in proceedings of the International conference on Computer-Aided Design (ICCAD), 2013, USA.
  3. P. M. B. Rao, A. Amouri, S. Kiamehr, M. Tahoori, "Altering LUT Configuration for Wear-out Mitigation of FPGA-Mapped Designs", Proceedings of the IEEE International Conference on Field Programmable Logic and Applications (FPL), 2013, Porto, Portugal
  4. F. Oboril, I. Sagar, M. Tahoori, "A-SOFT-AES: Self-Adaptive Software-Implemented Fault-Tolerance for AES", Proceedings of the IEEE International On-Line Testing Symposium (IOLTS) 2013, Greece.
  5. F. Firouzi, M.B. Tahoori, F. Ye, K. Chakrabarty, "Representative Critical-Path Selection  for Aging-induced Delay Monitoring ", Proceedings of International Test Conference (ITC), 2013, USA.
  6. A. Amouri, H. Amrouch, T. Ebi, J. Henkel, M. Tahoori, "Accurate Thermal-Profile Estimation and Validation for FPGA-Mapped Circuits", Proceedings of the 21st IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM), Seattle, Washington, USA, April 28-30, 2013 (Received a 'European Network of Excellence on High Performance and Embedded Architecture and Compilation' (HiPEAC) Paper Award)
  7. M. Ebrahimi, H. Asadi, M. Tahoori, "A Layout-based Approach for Multiple Event Transient Analysis", in proceedings of 50th Design Automation Conference (DAC), 2013, USA.
  8. J. Henkel, L. Bauer, N. Dutt, P. Gupta, S. Nassif, M. Shafique, M. Tahoori, N. Wehn, "Reliable On-Chip Systems in the Nano-Era: Lessons Learnt and Future Trends", in proceedings of 50th Design Automation Conference (DAC), 2013, USA.
  9. S. Kiamehr, F. Firouzi, M. Tahoori, "A Layout-aware X-Filling Approach for Dynamic Power Supply Noise Reduction in At-Speed Scan Testing", in Proceedings of European Test Symposium (ETS), 2013, France.
  10. S. Kiamehr, M. Ebrahimi, F. Firouzi, M. Tahoori, "Chip-level Modeling and Analysis of Electrical Masking of Soft Errors", in proceedings of 31st VLSI Test Symposium (VTS), 2013, USA
  11. M. Ebrahimi, L. Chen, H. Asadi, M. Tahoori, "CLASS: Combined Logic and Architectural Soft Error Sensitivity Analysis", in Proceedings of Asia and South Pacific Design Automation Conference (ASPDAC), 2012, Japan.
  12. F. Firouzi, S. Kiamehr, M. Tahoori, "Statistical Analysis of BTI in the Presence of Process-induced Voltage and Temperature Variations", in Proceedings of Asia and South Pacific Design Automation Conference (ASPDAC), 2013, Japan.
  13. S. Kiamehr, F. Firouzi, M. Tahoori, "Aging-aware Timing Analysis Considering Combined Effects of NBTI and PBTI", in Proceedings of International Symposium on Quality Electronic Desing (ISQED), 2013 , USA.
  14. Y. Hara-Azumi, F. Firouzi, S. Kiamehr, M. Tahoori, "Instruction-Set Extension under Process Variation and Aging Effects", in Proceedings of  Design, Automation & Test in Europe (DATE), 2013, France.
  15. F. Firouzi, S. Kiamehr, M. Tahoori, S. Nassif, "Incorporating the Impacts of Workload-Dependent Runtime Variations into Timing Analysis", in Proceedings of Design, Automation & Test in Europe (DATE), 2013, France.
  16. F. Oboril, M.  Tahoori, "MTTF-Balanced Pipeline Design",  in Proceedings of Design, Automation & Test in Europe (DATE), 2013, France. (Best Paper Candidate)

 

Workshops:
  1. E. Costenaro, A. Evans, D. Alexandrescu, L. Chen, M. Tahoori and M. Nicolaidis, "Towards a Hierarchical and Scalable Approach for Modeling the Effects of SETs", The 9th Workshop on Silicon Errors in Logic – System Effects (SELSE), 2013, USA
  2. A. Herkersdorf, M. Engel, M. Glass, J. Henkel, V.B. Kleeberger, M.A. Kochte, J.M. Kuhn, S.R. Nassif, H. Rauchfuss, W. Rosenstiel, U. Schlichtmann, M. Shafique, M.B. Tahoori, J. Teich, N. Wehn, C. Weis, H. Wunderlich, "Cross-layer Dependability Modeling and Abstraction in System on Chip", The 9th Workshop on Silicon Errors in Logic – System Effects (SELSE), 2013, USA.
  3. M, Beste, M. Tahoori, "Effect of the Active Layer on Carbon Nanotube-based Cell Designs", proceedings of Workshop on Design and Test Methodologies for Emerging Technologies (DETMET), 2013, France

 

2012

 

Journals:

 

  1. F. Oboril, M.  Tahoori, "ExtraTime: Eine Mikroarchitektur-Simulationsumgebung zur Modellierung, Analyse und Linderung von Alterungseffekten", 11/2012 GMM Mechatronik (invited paper)
  2. M. Zamani, H. Mirzaei, M. Tahoori, "ILP Formulations for Variation/Defect Tolerant Logic Mapping on Crossbar Nano-Architectures", in ACM Journal of Emerging Technologies in Computing Systems (JETC), 2012
  3. B. Ghavami, M. Raji, H. Pedram, M. Tahoori, "Design and Analysis of a Robust Carbon Nanotube-based Asynchronous Primitive Circuit", in ACM Journal of Emerging Technologies in Computing Systems (JETC), 2012
  4. H. Asadi, M. Tahoori, M. Fazeli, S.G. Miremadi, "Efficient algorithms to accurately compute derating factors of digital circuits", Elsevier Microelectronics Reliability, 2012

 

Conferences:
 
  1. A. Amouri, S. Kiamehr, M. Tahoori, "Investigation of Aging Effects in Different Implementations and Structures of Programmable Routing Resources of FPGAs", Proceedings of the International Conference of Field-Programmable Technology (FPT), Seoul, Soth Korea
  2. F. Oboril, F. Firouzi, S. Kiamehr, M. Tahoori, "Reducing NBTI-induced Processor Wearout by Exploiting the Timing Slack of Instructions", Proceedings of CODES+ISSS 2012, Tampere, Finland
  3. U. D. Bordoloi, B. Tanasa, M. Tahoori, P. Eles, Z. Peng, S. Z. Shazli and S. Chakraborty, "Reliability-Aware Instruction Set Customization for ASIPs with Hardened Logic", Proceedings of the 18th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA), Seoul, Korea
  4. A. Amouri, M. Tahoori, "High-Level Aging Estimation For FPGA-Mapped Designs", Proceedings of the IEEE International Conference on Field Programmable Logic and Applications (FPL), 2012, Oslo, Norway
  5. L. Chen, M. Tahoori, "An Efficient Probability Framework for Error Propagation and Correlation Estimation", 18th IEEE International On-Line Testing Symposium (IOLTS), Sitges, Spain, 2012
  6. S. Shazli and M. Tahoori, "Online Detection And Recovery Of Transient Errors In Front-End Structures Of Microprocessors", proceedings of the IEEE European Test Symposium (ETS), Annecy, France
  7. F. Oboril and M. Tahoori, "ExtraTime: Modeling and Analysis of Wearout due to Transistor Aging at Microarchitecture-Level", proceedings of the international conference on Dependable Systems and Networks (DSN), Boston, USA
  8. S. Kiamehr, F. Firouzi, and M. Tahoori, "Input and Transistor Reordering for NBTI and HCI Reduction in Complex CMOS Gates", Proceedings of the 22nd GLVLSI 2012, Salt Lake City, Utah, USA
  9. M. Zamani, M. Tahoori, "Reliable Logic Mapping on Nano-PLA Architectures", Proceedings of the 22nd GLVLSI 2012, Salt Lake City, Utah, USA
  10. F. Oboril and M. Tahoori, "Reducing Wearout in Embedded Processors using Proactive Fine-Grain Dynamic Runtime Adaptation", proceedings of the IEEE European Test Symposium (ETS), Annecy, France
  11. M. Zamani, M. Tahoori, K. Chakrabarty, "Ping-Pong Test: Compact Test Vector Generation for Reversible Circuits", 30th IEEE VLSI Test Symposium  (VTS), Hyatt Maui, Hawaii, USA.
  12. F. Firouzi, S. Kiamehr, and M. Tahoori, "NBTI Mitigation by Optimized NOP Assignment and Insertion", DATE, 2012
  13. M. Beste, M. Tahoori, "Layout-Driven Robustness Analysis for Misaligned Carbon Nanotubes in CNTFET-based Standard Cells", DATE 2012, Dresden

 

Workshops:
  1. L. Chen, M. Tahoori, "Soft Error Propagation and Correlation Estimation in Combinational Network", The First Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale (MEDIAN), Annecy, France, 2012
  2. F. Oboril, F. Firouzi, S. Kiamehr, M. Tahoori, "Impact of Instruction Delay on Processor Wearout", proceedings of the Workshop on Processor Verification, Test and Debug (IWPVTD), , Annecy, France, 2012

 

2011

 

Journals:

 

  1. M. Tahoori, “Variation and defect tolerance for diode-based nano crossbars”, Elsevier Nano Communication Networks Journal, 2011.

 

Conferences:
 
  1. J. Henkel, L. Bauer, J. Becker, O. Bringmann, U. Brinkschulte, S. Chakraborty, M. Engel, R. Ernst, H. Härtig, L. Hedrich, A. Herkersdorf, R. Kapitza, D. Lohmann, P. Marwedel, M. Platzner, W. Rosenstiel, U. Schlichtmann, O. Spinczyk, M. Tahoori, J. Teich, N. Wehn, H. J. Wunderlich, "Design and architectures for dependable embedded systems", proceedings of CODES+ISSS 2011: 69-78
  2. S. Kiamehr, A. Amouri, and M. Tahoori, "Investigation of NBTI and PBTI Induced Aging in Different LUT Implementations", proceedings of the IEEE international conference on Field Programmable Technology (FPT), 2011
  3. F. Oboril, M. Tahoori, V. Heuveline, D. Lukarski, and J. P. Weiss, "Numerical Defect Correction as an Algorithm-Based Fault Tolerance Technique for Iterative Solvers", proceedings of the 17th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC)
  4. M. Zamani, and M. Tahoori, "Online Missing/Repeating Gate Faults Detection in Reversible Circuits", proceedings of IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFTS), 2011.
  5. F. Firouzi, S. Kiamehr, and M. Tahoori, “Modeling and Estimation of Power Supply Noise using Linear Programming”, proceedings of IEEE/ACM International Conference on Computer Aided Design (ICCAD), 2011.
  6. M. Fazeli, S. G. Miremadi, H. Asadi, M. Tahoori, “Soft Error Rate Estimation of Digital Circuits in the Presence of Multiple Event Transients (METs)”, Design Automation and Test in Europe (DATE), 2011.
  7. S. Kiamehr, F. Firouzi, and M. Tahoori, "Stacking-based Input Reordering for NBTI Aging Reduction", Proceedings of Zuverlässigkeit und Entwurf (ZuE), 2011
  8. F. Oboril, M. Tahoori, "ExtraTime: A Framework for Exploration of Clock and Power Gating for BTI and HCI Aging Mitigation", Proceedings of Zuverlässigkeit und Entwurf (ZuE), 2011 (Best Paper Award)
  9. L. Chen, F. Firouzi, S. Kiamehr, M. Tahoori, "Fast and Accurate Soft Error Rate Estimation at RTL level", Proceedings of Zuverlässigkeit und Entwurf (ZuE), 2011
  10. A. Amouri, M. Tahoori, "A Low-Cost Sensor for Aging and Late Transitions Detection in Modern FPGAs", Proceedings of the IEEE International Conference on Field Programmable Logic and Applications (FPL), 2011 (Michal Servit Award Candidate)
  11. M. Zamani, M. Tahoori, "Self-Timed Nano-PLA", In IEEE/ACM International Symbosium on Nanoscale Architectures (NANOARCH), 2011.
  12. M. Zamani, N. Farazmand, M. Tahoori, "Fault Masking and Diagnosis in Reversible Circuits", In European Test Symposium (ETS), 2011.
  13. M. Zamani, M. Tahoori, "Variation-Immune QDI Implementation on Nano-Crossbar Arrays", In ACM Great Lakes Symposium on VLSI (GLSVLSI), 2011.
  14. F. Firouzi, S. Kiamehr, M. Tahoori, "A Linear Programming Approach for Minimum NBTI Vector Selection", In ACM Great Lakes Symposium on VLSI (GLSVLSI), 2011.
  15. M. Zamani, M. Tahoori, "Variation-aware Logic Mapping for Crossbar Nano-architectures", In IEEE 16th Asia and South Pacific Design Automation Conference (ASP-DAC), 2011.

 

Workshops:
  1. M. Zamani, M. Tahoori, "Variation Tolerance for Nano-PLA Architectures", In North Atlantic Test Workshop (NATW), 2011.

 

2010

 

Journals:

 

  1. M. Tahoori, "High Resolution Application Specific Fault Diagnosis of FPGAs", IEEE Transactions on VLSI (TVLSI), 2010.
  2. H. Asadi, M. Tahoori, "Soft Error Modeling and Remediation Techniques in ASIC Designs", Elsevier Microelectronics Journal, 2010.

 

Conferences:
 
  1. N. Farazmand, M. Zamani, M. Tahoori, “Online fault testing of reversible logic using dual rail coding”, In International Online Testing Symposium (IOLTS), 2010.
  2. M. Fazeli, S. G. Miremadi, H. Asadi, M. Tahoori, “A Fast Analytical Approach to Multi-Cycle Soft Error Rate Estimation of Sequential Circuits”, Euromicro Conference on Digital System Design (DSD), 2010.
  3. M. Zamani, N. Farazmand, M. Tahoori, “Online Multiple Fault Detection in Reversible Circuits”, In International Symposium on Defect and Fault Tolerance of VLSI (DFTS), 2010.
  4. M. Abdul-aziz, M. Tahoori, "Soft Error Reliability Aware Placement and Routing for FPGAs", International Test Conference (ITC), 2010.
  5. N. Farazmand, M. Tahoori, “Multiple Fault Diagnosis in Crossbar Nano-architectures”, In European Test Symposium (ETS), 2010
  6. M. Zamani, M. Tahoori, “A Transient Error Tolerant Self-Timed Asynchronous Architecture”, In European Test Symposium (ETS), 2010
  7. C. Tunc, M. Tahoori, “On-the-fly Variation Tolerant Mapping in Crossbar Nano-Architectures”, In IEEE VLSI Test Symposium (VTS), 2010.
  8. C. Tunc, M. Tahoori, “Variation Tolerant Logic Mapping for Crossbar Array Nano Architectures”, In IEEE Asian South Pasific Design Automation Conference (ASP-DAC), 2010 (best paper nomination).

 

2009

 

Journals:

 

  1. M. Tahoori, S. Shazli, “Using Boolean Satisfiability for Computing Soft Error Rates in Early Design Stages, Elsevier Journal of Microelectronics Reliability, 2009.
  2. M. Tahoori, H. Asadi, B. Mullins, D. Kaeli, “Obtaining FPGA Soft Error Rate in High Performance Information Systems”, Elsevier Journal of Microelectronics Reliability, Vol. 49, No. 5, May 2009.
  3. M. Tahoori, “Low Overhead Defect Tolerance in Crossbar Nano-architectures”, ACM Journal of Emerging Technologies in Computing (JETC), Vol. 5, No. 2, 2009.

 

Conferences:

 

  1. N. Farazmand, M. Tahoori, “Online Multiple Error Detection in Crossbar Nano-architectures”, In IEEE International Conference on Computer Design (ICCD), 2009.
  2. A. Abdi, M. Tahoori, E. Emamian, “Identification of Critical Molecules Via Fault Diagnosis Engineering”, In International Conference of IEEE Engineering in Medicine and Biology Society (EMBC), 2009.
  3. S. Shazli, M. Tahoori, “Soft error rate computation in early design stages using boolean satisfiability”, In ACM Great Lakes Symposium on VLSI (GLSVLSI), Pages 101-104, 2009.
  4. M. Tahoori, BISM: built-in self map for hybrid crossbar nano-architectures, In ACM Great Lakes Symposium on VLSI (GLSVLSI), Pages 153-156, 2009.
  5. N. Farazmand, M. Tahoori, “Online Detection of Multiple Faults in Crossbar Nano-architectures Using Dual Rail Implementations”, In IEEE International Symposium on Design and Test of Defect-Tolerant Nanoscale Architectures (NANOARCH), 2009.
  6. S. Shazli, M. Tahoori, “Transient Error Detection and Recovery in Processor Pipelines”, In 24th IEEE International Symposium on Defect and Fault Tolerant in VLSI Systems (DFT), 2009.

 

Workshops:
  1. S. Shazli, M. Tahoori, “Modeling Availability and Performability in High Performance Information Systems”, In North Atlantic Test Workshop (NATW), 2009.